Networking ASIC Architect
Job Description;
In this position, the candidate will need to define the networking ASIC chip architecture, define the networking interface, communicate the architecture detail to the design team and attend related industry conferences.
Responsibilities;
1. Discuss with the other architecture team in the ASIC architecture details.
2. Define the Ethernet networking ASIC chip level architecture.
3. Define the networking algorithms to be used in the ASIC.
4. Define the ASIC data structure and interface signals.
5. Communicate to the ASIC designer on the architecture design.
Requirements;
1. MSEE required.
2. 7 or more years experience in the networking ASIC design.
3. Understanding of the networking protocols such as Ethernet, MPLS, TCP/IP, UDP and unicast and multi-cast.
4. Have good understanding of the ASIC design methodology.
If interested, please just send your resume to;
Contact;
Mark Apton
Senior Recruiter, Human Resources
Futurewei Technologies - US R&D Center
http://www.linkedin.com/in/markapton
E-mail: mark.apton@huawei.com
2330 Central Expressway, Santa Clara, California, 95050
Phone: 408- 330-5338; Fax: 408-330-5089
www.usahuawei.com ($30B)
Not interested? Know anyone? Please forward.
| Reply via web post | Reply to sender | Reply to group | Start a New Topic | Messages in this topic (1) |
