ASIC Design Engineer for 3D Memory
| In this position, this individual will define architecture for 3D memory controllers from design specifications and proprietary protocols. Own and implement design and perform verification, synthesis, and back-end annotated timing closure. Support verification, circuit, and test groups throughout design cycle and silicon bring up. Strong knowledge of Verilog and scripting languages (PERL, TCL) is required. Familiarity with memory designs a plus. |
To Apply:
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MARKETPLACE
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