Wednesday, October 31, 2012

[JimsJobs] Sr. SI Engineer (Backplane Architect) needed at Huawei in Santa Clara, CA;

 

My Team is looking for a Senior Staff Engineer(Backplane Architect)/Principle Engineer;

Responsibilities/Description;

 

Responsible for providing the backplane architecture and 10G+ High Speed SI

solutions for Next Generation telecommunications equipment in the router,

switch and transmission product lines to meet system design requirements.

Experience in co-designing of ASIC, Package, PCB and System interconnects

desired. including:

-    Design and analysis of multi-gigabit serial links for Backplane and

   chip-to-chip interfaces meeting CEI, XFI, XLAUI, SFI, 10Gbase-KR, PCIe, and

   other standards.

- Familiar with ASIC, Hardware, interconnect teams to evaluate design

  tradeoffs and optimize design performance / risk / cost /manufacturability.

- To evaluate package designs, characterization of SerDes, and design

  experiments to do the same.

- Modeling of electromagnetic 3-D structures.

- Modeling and analyzing power delivery networks (PDN).

- Familiar with memory technologies such as DDR2/DDR3 is preferred.

 

Qualifications/Requirements:

 

-  Performing physical measurements to collect data for design

   validation and simulation correlations.

-  Knowledgeable in using most major SI/PI tools: HFSS, CST, HSPICE,

   Sigrity Tools, StatEye, ADS, Matlab, Cadence Allegro and APD, HSPICE, and

   other tools.

-  Experience in correlating simulation results with lab measurements

    using oscilloscopes, TDRs, VNAs, BertScope is a plus. Must be self

   motivated with strong communication and teamwork skills.

-  The working experience in Core router or Edge router similar product

   in large telecomm infrastructure company.

   A MSEE, or a PhD is preferred, with 10years of experience.

 

Some portion of time will be spent in Shenzhen working with the HQ SI team. Travel will be about 30-60% to China.

 

Please contact mark.apton@huawei.com

 

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